When integrated circuits are fabricated on silicon-on-insulator (SOI) substrates, an oxide layer lies between the bulk silicon and the silicon layer in which active devices are fabricated. The oxide layer effectively electrically isolates the functional circuits of the integrated circuit chip from the bulk silicon portion of the substrate allowing charge to buildup in various circuit nodes of the integrated circuit during and after fabrication.
While various schemes have been developed to dissipate this charge buildup, the increasingly harsh processing environments in terms of total charge that may be pumped into an integrated circuit and decreasing device robustness in terms of resistance to charge buildup have rendered these schemes ineffective. Thus there is a need for improved charge dissipation structures, methods of fabricating improved charge dissipation structures and a method for designing integrated circuit chips having improved charge dissipation structures.